Study on the interfacial thermal resistance in the back-end-of-line of chips

JQ Hu and ZC Zong and ZP Wu and B Li and XD Chen and B Yu and YL Xie and GY Li and HS Fang and N Yang, INTERNATIONAL JOURNAL OF HEAT AND MASS TRANSFER, 251, 127385 (2025).

DOI: 10.1016/j.ijheatmasstransfer.2025.127385

In the thermal management of advanced electronic devices, interfacial thermal resistance is a critical challenge. The atomic scale interfaces at the back-end-of-line of chips often hinder efficient heat dissipation. The interfacial thermal resistance of three representative interfaces Si/SiO2, Cu/SiO2 and Cu/Si, was explored through both 3 omega measurements and molecular dynamics simulations over a temperature range of 60 degrees C to 120 degrees C. The experimental measurements range from 0.9 x 10-8m2K/W and 3.5 x 10-8m2K/W, and the simulated values range from 0.4 x 10-8m2K/W and 6.0 x 10-8m2K/W. The three interfaces prepared in the experiment were characterized using atomic-force microscopy to obtain values of roughness. The simulation results exhibit excellent agreement with the measured results, with the minimum difference being as low as 29 %. Then, the effects of interfacial roughness and interaction forces on interfacial thermal resistance are discussed separately. It is believed that the presented results could provide useful insights into the thermal management and heat dissipation for chips.

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